FPGA-Based Tensor Compressive Sensing Reconstruction Processor for Terahertz Single-Pixel Imaging Systems

FPGA-Based Tensor Compressive Sensing Reconstruction Processor for Terahertz Single-Pixel Imaging Systems

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Terahertz (THz) imaging system has great potentials for material identification, security screening, circuit inspection, bioinformatics and bio-imaging because it can penetrate various non-metallic materials and inhibits unique spectral fingerprints of a great variety of optically opaque materials in our daily lives.However, THz emitters and detectors are still extremely expensive.Therefore, the single-pixel compressive sensing imaging technique becomes a potential solution for the princess polly dresses long sleeve implementation of a THz imaging system.This paper presents a tensor-based single-pixel compressive sensing model and a reconstruction algorithm for THz single-pixel imaging systems based on the generalized tensor compressive sensing framework.

To accelerate the THz image reconstruction, a low-complexity 2-D compressive sensing processor based on power singular value decomposition method (2DCS-PSVD) was designed and implemented in this paper.In the $32 imes32$ single-pixel THz imaging system, the 2DCS-PSVD algorithm requires 78.9% complexity of the modified generalized tensor compressive sensing parallel algorithm (GTCS-P) with little merlot redbud tree for sale image quality degradation.The 2DCS-PSVD processor was further designed and implemented in the Xilinx ZCU102 SOC FPGA plate-form.

The proposed FPGA-based tensor-based compressive sensing processor achieved a throughput of 1127 frames/sec and had the highest normalized hardware efficiency compared to other state-of-the-art works in the literature.